Volpiano (Italy)

September 26, 2024

KGD Testing: Ensuring Quality in Semiconductor Manufacturing

Known Good Die (KGD) testing is a critical step in the semiconductor manufacturing process, especially for power semiconductor devices like Silicon Carbide (SiC) devices. By performing comprehensive tests at the individual die level, manufacturers can identify and eliminate defective components before packaging, ensuring the overall quality and reliability of their products.

A Multi-Tiered Approach in Semiconductor Manufacturing: Wafer, Die, and Package Testing

Semiconductor manufacturing is a complex process that requires meticulous testing at various stages to guarantee flawless device functionality. The testing stages include:

Wafer Test

• Performed early in the fabrication process, typically after key layers have been deposited and patterned on the silicon wafer.
• Utilizes specialized equipment (wafer probers with probe cards) to probe individual circuits on the wafer and assess basic functionality and electrical characteristics.
• Serves as a preliminary screening step to identify and remove wafers with significant defects before further processing.

Die Test (KGD)

• Focuses on individual dies after they have been separated from the wafer through a dicing process.
• Utilizes specialized handlers and probing modules to move and probe the dies.
• Plays a vital role in ensuring power semiconductor reliability, allowing tests that cannot be performed at wafer level.

Package Test

• Conducted after the die has been encapsulated in the final protective package with external connections.
• Verifies the functionality of the entire packaged device, including the interaction between the die and the packaging materials.
• This final test ensures the complete device meets all performance specifications before shipment to customers.

By implementing a multi-tiered testing approach that incorporates wafer, KGD, and package testing, manufacturers can achieve a high degree of confidence in the quality and reliability of their semiconductor devices, optimizing yield and reducing manufacturing costs. By screening parts at various stages – from raw silicon wafers to completed modules – defective components can be identified and removed as early as possible.

The Importance of Known Good Die Testing for Power Semiconductor Devices

The KGD testing stage offers several key advantages for power semiconductor devices:

• Early Defect Detection: Identifying and removing defective dice before packaging significantly reduces yield losses and downstream costs. Catching defects early minimizes wasted resources: Discovering a defective die on the singulated wafer is far cheaper than finding a problem in a fully assembled module.
• Faster Time to Market: Identifying and resolving issues early prevents delays caused by late-stage defect discovery and rework.
• Enhanced Reliability: KGD testing helps to ensure that only high-quality components are used in the final module, leading to improved reliability and performance.
• Improved Process: KGD testing data can be used to identify potential weaknesses in the manufacturing process, and make the required adjustments.

Unveiling the Power of KGD Testing: Static, Dynamic, and Short Circuit Tests for SiC Devices

While KGD testing offers significant benefits, it also presents unique challenges. Unlike Si devices, SiC operates at much higher voltages and currents. This necessitates specialized test equipment capable of handling these extreme conditions safely and accurately, at wafer, KGD and package level.

The specific tests performed at the KGD stage to identify and eliminate potential defects can be broadly categorized into three groups:

Static Tests

These tests measure fundamental electrical parameters of the SiC device under steady-state conditions.

• Common static tests for SiC devices include:
  • Threshold Voltage (Vth): Measures the minimum gate voltage required to turn on the device.
  • On-Resistance (Ron): Characterizes the resistance of the device when conducting current.
  • Leakage Current (Ileak): Evaluates the amount of current flowing through the device when it’s in the off state.
  • Breakdown Voltage (Vbr): Determines the maximum voltage the device can withstand before experiencing a breakdown.

Dynamic Tests

These tests assess the behavior of the SiC device under dynamic operating conditions that simulate real-world use cases.

• Key dynamic tests for SiC devices include:
  • Switching Characteristics: Measure the time it takes for the device to transition between on and off states. This includes turn-on time, turn-off time, and gate charge characteristics.
  • Transfer Function: Analyzes the relationship between the gate voltage and the drain current, providing insights into device behavior during switching.
  • Capacitance-Voltage (C-V) Measurement: Evaluates the capacitance of the device at different gate voltages, helping to identify potential defects in the gate oxide layer.

Short Circuit Test

• This crucial test assesses the ability of the SiC device to withstand a sudden and significant increase in current flow.
• It simulates a potential fault condition where the device experiences a short circuit between its terminals.
• The short-circuit test measures the time it takes for the device to fail (short-circuit withstand time) and helps identify hidden defects that could lead to catastrophic failures during normal operation.

By implementing a comprehensive KGD testing strategy that incorporates these static, dynamic, and short-circuit tests, manufacturers can effectively screen out defective SiC devices. This not only ensures the reliability and performance of the final product but also reduces production costs by minimizing yield losses.

Challenges of KGD Short Circuit Testing

Unlike packaged modules with integrated heat sinks, KGD devices are small, thin, and lack dedicated heat dissipation mechanisms. During a short-circuit test, the high current flow generates significant heat, which can easily exceed the device’s thermal capacity and lead to catastrophic failure. Due to the limited heat dissipation and the fragile nature of SiC, a severe short-circuit event at the KGD level could result in an explosion. This poses a safety hazard and can damage the test equipment. The high temperatures and potential for explosions during a KGD short-circuit test can cause the device metallization to mold onto the probing pogo pins. This creates challenges in removing the device for further testing and introduces contamination risks into the test equipment, impacting future test accuracy.

Essential Features for Safe and Effective KGD Short Circuit Test Equipment

Performing a safe and effective short-circuit test on KGD SiC devices requires specialized test equipment equipped with several critical features. A key element for safety is the ability to interrupt the current flow within a very short timeframe (tens of nanoseconds) in case of an over-current event. This rapid shutoff helps prevent excessive heat generation and potential explosions during a KGD short-circuit test. Advanced electronic components and high-speed circuit designs are crucial for achieving this ultra-fast current shutoff capability.

Minimizing stray inductance within the test path is also essential for accurate and controlled short-circuit testing. Stray inductance can slow down the rise and fall times of the current pulse, impacting the test results and potentially delaying the current shutoff in case of a fault. The test equipment design should utilize low-inductance components and minimize cable lengths to reduce the overall stray inductance in the circuit.

In addition to over-current protection, the tester should also incorporate safeguards against over-voltage situations. This helps prevent device damage and potential arcing events during the test. Voltage monitoring circuits and fast-acting relays can be employed to detect over-voltage conditions and disconnect the power supply if necessary.

Finally, the risk of arc suppression must be assessed carefully. During a short-circuit test, the sudden and significant increase in current flow can lead to the ionization of the surrounding gas molecules. This creates a conductive path between the device terminals, resulting in an electrical arc. Arcs generate intense heat and light, which can damage the KGD device under test and potentially harm the test equipment. Conditioning the test chamber with compressed air is a crucial strategy for suppressing electrical arcing during KGD short-circuit testing of SiC devices, according to Paschen’s Law which describes the relationship between the breakdown voltage (voltage required to initiate an arc) of a gas, the pressure of the gas, and the gap length between the two conductors. By increasing the pressure of the gas in the test chamber using compressed air, we effectively raise the breakdown voltage: This makes it more difficult for an arc to initiate between the device terminals, even under the high current conditions of a short-circuit test. protecting the device and the test equipment. Utilizing dry air in the test chamber minimizes the presence of water vapor, further contributing to arc suppression.

By incorporating these essential features, KGD short-circuit test equipment can achieve a balance between safety, effectiveness, and the ability to identify potential weaknesses in SiC devices.

Current Protection Module for KGD Testing: Safeguarding Contact Probes

During KGD testing, especially with short-circuit tests, high current flow can occur. This can potentially damage the delicate contact probes used to probe the SiC device. SPEA’s test equipment incorporates a current protection module that acts as a safeguard by limiting the current that can flow through the probes. This prevents excessive heat generation and potential melting or warping of the probes, ensuring their longevity and functionality.

The effectiveness of the current protection module is further enhanced by its ability to be sized based on the specific current carrying capacity of the contact probes being used. This ensures that the current limit is set appropriately to protect the probes without compromising the test itself.

In KGD testing setups, contact probes (pogo pins or needles) are often grouped to probe different parts of the SiC device. The current protection module can offer an additional benefit by allowing for balancing of the currents between these different groups. This feature can be crucial for ensuring even distribution of current flow across the device during testing. Uneven current distribution could lead to inaccurate test results or even damage to specific areas of the device.

Conclusions

Known Good Die (KGD) testing is a cornerstone of quality control for SiC devices, ensuring reliable, high-performance products while minimizing yield losses through early defect detection. A comprehensive test strategy should encompass static, dynamic, and short-circuit testing to verify critical parameters under real-world conditions.

Unlike packaged modules, KGD devices present unique challenges in dynamic and short-circuit testing. Their limited heat dissipation can lead to safety hazards, explosions, and severe equipment damage. To mitigate these risks, test equipment should include ultra-fast current limitation, low stray inductance design, and electrical arc suppression mechanisms.

By implementing these features, manufacturers can enhance the efficiency and effectiveness of their KGD testing strategies for SiC devices.

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